The present invention relates to an apparatus and a system for providing receive data of various kinds of quality level from send data mainly because of sender""s intention in a sending/receiving apparatus for data including precise image data used for such as a facsimile, the Internet, an image database.
In the following, related art of the invention will be explained.
FIGS. 35 and 36 are block diagrams showing configurations of conventional encoder and decoder. In an encoder of FIG. 35, data sequence 501 is input to a modeling unit 502A, data value 503 and a parameter (for encoding) 504 are sequentially output, the data value is encoded at an encoding unit 505, and a code sending unit 506 outputs code 507.
In a decoder of FIG. 36, the code 507 is input to a code receiving unit 508, and a decoding unit 509 decodes the data value 503 to be decoded using the parameter (for decoding) 504 sequentially input from a modeling unit 502B and the code 507, and decoded data value 503 is output to the modeling unit 502B to output the data sequence 501.
Here, conventionally, the encoder keeps data contents confidential by switching lines for exchanging bits by a data bit switch, as shown in FIG. 37, by input (point A) of the data sequence 501 shown in FIG. 35, or by encrypting the data with an encryptor as shown in FIG. 38, which encrypts the data using an ExOR with random number generated by a random number generator 561 constructed based on an encryption key 560, at output (point B) of the code 507.
In the conventional decryptor, the encrypted data is decrypted into the origianl code 507 using the ExOR with the same random number with the encoder at input (point B) of the code 507 as shown in FIG. 36, or the data is returned to the original data sequence 501 by exchanging bits at output (point A) of the data sequence 501.
As described above, conventionally, the encoder or the decoder is configured to employ encryption at point A or point B and to reproduce the original data sequence from the encoded data, independent from the encoding (compression) unit or the decoding (uncompression) unit.
With respect to such conventional technique, for example, the Japanese unexamined patent publication No. 8-331395, xe2x80x9cMultiple Value Image Sending Apparatusxe2x80x9d discloses a case in which the data is integrated by switching bits or using a simple logical conversion of bit value. Further, the Japanese unexamined patent publication No. 7-111646, xe2x80x9cScrambling Apparatus, Descrambling Apparatus, and Signal Processing Apparatusxe2x80x9d discloses a case of encryption explained above. Further, the Japanese unexamined patent publication No. 8-181966, xe2x80x9cSending Apparatus, Receiving Apparatus, and Communication Processing Systemxe2x80x9d discloses a case in which the data is encoded by distributing to plural layers and the encoded data is encrypted with various confidential strength. Yet further, the Japanese unexamined patent publication No. 9-205630, xe2x80x9cTelevision Signal Sending/Receiving Method, and Television Signal Sending/Receiving Apparatusxe2x80x9d discloses a case in which the data is encoded/sent by distributing to plural channels and the reproduction quality of receive data is made different by not reproducing a part of the receive data based on an access right or a kind of right, which the receiver holds.
As one example of conventional encoding method, an encryption employing arithmetic encoding which can obtain high compression ratio will be explained. The most representative encoder/decoder for arithmetic encoding is QM-Coder described in ITU-T, International Standard Recommendation T.82 and T.81. Generally, the arithmetic encoding performs optimization by learning the change of characteristics in order to decrease the reduction of the compression ratio, while the conventional encoding cannot increase the compression ratio since the encoding cannot trace the change of characteristics of the data. In particular, to determine parameters for encoding/decoding, the encoded/decoded data is referred to and the parameter is updated by feeding back the encoded/decoded result. Accordingly, when an error occurs in the decoding process, the decoder cannot generate/select a common parameter with the encoder after that, which generates a fatal error to the decoded data.
The features of the arithmetic encoding is used in some conventional arts such as the Japanese Unexamined Patent Publication No. 5-56267, xe2x80x9cEncoding/Decoding Methodxe2x80x9d, in which a dummy bit is added to the top of the arithmetic code generated or at an interval of predetermined bits, the code bit is inverted, or the table value is converted. The Japanese Unexamined patent Publication No. 6-112840, xe2x80x9cEncoding/Decoding Method and Apparatusxe2x80x9d discloses a case in which an initial value of a certain effective region that is an arithmetic encoding parameter is changed. Further, the Japanese Unexamined Patent Publication No. 11-073102, xe2x80x9cSecret Key Encryption/Decryption Method and Apparatusxe2x80x9d discloses a case in which an initial value of the effective region and estimated probability, or assigned region range is changed. The above related arts treat the changed value as an encryption key.
Before concrete explanation of the arithmetic encoding, a concept of the binary value arithmetic encoding will be described referring to FIG. 39. In arithmetic encoding, a coordinate value of binary floating-point number which is equal to or greater than 0.0 and less than 1.0 on the number line becomes a code. In the encoding process, the above range on the number line is assumed as the effective region and is divided based on the occurrence probability of the binary symbol, and a partial region corresponding to a symbol which actually occurs is treated as a new effective region and the above division will be repeated. MPS (ore Probable Symbol) means that a data value having more occurrence probability occurs, while LPS (Less Probable Symbol) means that a data value having less occurrence probability occurs. One coordinate value within the effective region updated by the final symbol is output as a code. During the encoding process, the code is operated as a lower limit value of the effective region, and updated as well as the effective region which is a difference between an upper limit value and the lower limit value within the figure. The code can be a coordinate value having the smallest number of effective digits after truncating 0s consecutively appeared to the last digit of the coordinate value. At this time, the code bit which is lacked at decoding can be compensated with truncated 0. Or the code bit which is truncated at encoding and compensated at decoding can be 1 if the values of manipulating bit are coincided between the encoding unit and the decoding unit.
The binary value arithmetic encoding and decoding will be explained referring to FIG. 40. In the figure, decimals on the number line show binary coordinate, the symbol 0 means MPS, and the symbol 1 means LPS. In encoding process, when an initial value of an interval A is set to 1.000, an initial value of a code C is set to 0.000, and a binary value sequence is DN=0101, the encoding will proceed as follows. The first binary data 0 matches the prediction value 0, and the symbol 0 (MPS) will be issued as xe2x80x9cprediction matchxe2x80x9d. Then, the interval is updated by the interval A0. To facilitate, the explanation, the context is a data value which occurred previously to the current value, the corresponding region to the symbol is equally divided (generally, it is divided by ratio of the occurrence probability), and the LPS interval Al is placed at upper to the MPS interval A0. The context (the initial value) corresponding to the first binary data, which does not have the previous data value, is set to 0, the prediction value (the initial value) corresponding to the context 0, 1 are both set to 0, and the first reference is shown by a frame in the figure. Next, the second binary data 1 has the context of value 0 of the previous (first) data, which shows the prediction value 0. The second binary data 1 does not match the prediction value 0, so that a symbol 1 (LPS) is issued as xe2x80x9cmismatchxe2x80x9d. The region range is updated by the interval A1. At this time, the interval A0 is added to the code C to update the lower limit value so as to be the lower limit value of the effective region. Similarly, the third, the fourth binary data are processed, and the lower limit value C=0.0101000 of the final effective region becomes a code value.
In case of decoding, the initial value of the region range A is set to 1.000, the initial value of the code C is set to the above binary decimal 0.0101000, the initial values of the context and the prediction value are set to the same values with the encoding process, and then the decoding process starts. On decoding the first binary data, the prediction value 0 is obtained corresponding to the context 0 as well as the encoding process. As the code C is included in the lower partial region A0, the corresponding symbol 0 (MPS) is decoded. Namely, as the first binary data does not match the prediction value, the prediction value 0 is decoded as the binary data value 0. The second binary data 1 has the context of the data value 0 of the previous (first) data, so that the prediction value 0 is obtained. As the code C is included in the upper partial region A1, the corresponding symbol is 1 (LPS). Namely, the second data does not match the prediction value, so that a non-prediction value (1xe2x88x92prediction value 0) is decoded as the binary data value 1. At this time, since the code C is updated as a displacement from the lower limit value of the effective region, and the partial region range A0 is subtracted from the code C. Similarly, the third, the fourth binary data values are processed, the binary data values 0, 1 are decoded, and it can be seen that the encoded binary data are correctly decoded.
On practical implementation of the arithmetic encoding, subtraction arithmetic encoding, which corresponds to the increase of number of effective digits in the encoding operation, is generally used. Hereinafter, the arithmetic code means the subtraction arithmetic code, and QM-Coder is also categorized in the subtraction arithmetic code. FIG. 41 shows a concept of the subtraction arithmetic encoding and a renormalization. Here, when the effective region becomes less than xc2xd (0.100), the region is multiplied by power of 2, and the region is extended to greater than xc2xd (0.100), which is called the renormalization. Through this operation, the number of digits of the binary floating-point number at computing time is kept fixed. At this time, the code value of the integer part cannot be determined because the bits of the integer part of consecutive 1s from the decimal and the upper 0 may be changed by a carry-over generated by the coordinate computation afterwards. The bits which are located at the upper digits to the above 1s and 0 are not influenced by the carry-over, so that the bits can be output.
The QM-Coder can be implemented by tables and processing flows disclosed in International Standard Recommendation T.82 of ITU-T. In the following, standard operations of encoding and decoding defined by the above document will be explained, in which data to be encoded is binary image data.
FIGS. 42 and 43 are block diagrams showing configurations of an encoder and a decoder of QM-Coder. In the explanation of this conventional art, an image memories 5A and 5B are placed inside the encoder and the decoder.
The image memory 5A of a QM encoder LA accumulates an input image 6, generates a context (10 bits, total number 1024) which is a reference pattern of encoded adjacent 10 pixels indicated by Model Template for Pixel to be encoded, and outputs the pixel to be encoded.
The image memory 5B of a QM decoder 1B accumulates decoded pixels, generates the context for the pixels to be decoded, outputs the context, obtains and accumulates the pixels decoded using the context, and outputs the image 6.
In the image memories 5A and 5B, standard model templates of two lines and three lines, respectively shown in FIG. 44, and either of them is selected at starting time of encoding/decoding. Information showing which template is used is notified by a header of code data, and the same template is used by the encoder and the decoder.
In the QM-Coder, the prediction matching probability of the pixel value is estimated for each context of the pixels to be encoded/decoded, and encoding/decoding is performed by learning according to the variation of the prediction matching probability. Learning is done by rewriting two variable tables having the context as an index. One of the variable tables is an MPS table 7 of 1 bit which stores the pixel value MPS having higher occurrence probability as the prediction value. The other is an ST table 8 of 7 bits which stores a state number (0-112) obtained by specifying a ratio of the prediction matching probability of the prediction value into 113 states.
As well as the variable tables, a constant table probability estimation table) is provided, which is used for referring the state number (state) as an index on encoding/decoding. Set values of the table is shown in FIG. 45.
The four constant tables are an LSZ table 9 storing LSZ value which shows an LPS region range by 16 bits, an NMPS table 10 showing a next state of MPS transition by 7 bits, an NLPS table 11 showing a next state of LPS transition by 7 bits, and an SWTCH table 12 showing an inversion of prediction value based on the result by one bit. (These names expressed by capital alphabet letters for variable and constant tables will be used as array names in processing flow explained below.)
The LSZ table 9 is referred to by an operating unit of an arithmetic encoder 13A/an arithmetic decoder 13B and is not directly related to learning of adaptive prediction. In the arithmetic encoder 13A/the arithmetic decoder 13B, a calculation is operated using the LSZ value of the LSZ table 9, and when an operation precision is reduced, the operation is renormalized. When the renormalization occurs, learning is implemented at the same time.
If the encoding/decoding symbol 14 is MPS when the renormalization occurs, the NMPS value is written in the ST table 8, the NLPS value is written if the encoding/decoding symbol 14 is LPS. The state transition is thus performed. The MPS shows that the pixel to be encoded/decoded 3 match the prediction value MPS7, and the LPS shows mismatch. On encoding, a pixel-to-symbol converter 15A outputs a symbol 14 to the arithmetic encoder 13A, and on decoding, the arithmetic decoder 13B outputs the symbol 14 to a symbol-to-pixel converter 15B. The arithmetic encoder 13A and the arithmetic decoder 13B inform of the renormalization and the symbol to an updaters 16 and 17, and only the prediction value 7 and the value of state 8 indicated by the context for the pixel are updated.
When the renormalization is performed because of the LPS and the prediction matching probability is {fraction (1/2)}, the MPS value 7 is inverted (operation xe2x80x9c1xe2x88x92MPSxe2x80x9d) and the inverted value based on the result is written in the MPS table 7. It is detected whether the prediction matching probability is xc2xd or not using the SWTCH value 12 as a flag.
In this way, updating processes are respectively performed to the two variable tables ST 8 and MPS 7, and the tables have to be managed respectively. In FIGS. 42 and 43, the updaters 17 and 16 determine the update values for the table ST 8 and MPS 7, rewrite the values of the tables, and thus the update process has been performed.
The image 6 and the code 4 in FIGS. 42 and 43 correspond to the data sequence 501 and the code 507 in FIGS. 35 and 36, respectively. The context 2, the image 3, and the image memories 5A and 5B in FIGS. 42 and 43 correspond to the parameter 504, the data value 503, and the modeling units 502A and 502B in FIGS. 35 and 36, respectively. Further, the state table 8 and the prediction table 7 through the arithmetic encoder 13A and the arithmetic decoder 13B correspond to the encoding unit and the decoding unit in FIGS. 35 and 36, respectively. Yet further, input/output parts of the arithmetic encoder 13A and the arithmetic decoder 13B in FIGS. 42 and 43 correspond to the code transmitting unit 506 and the code receiving unit 508 in FIGS. 35 and 36, respectively.
Before an explanation of the encoding processing flow and the decoding processing flow, bit assignments of an encoding register C30A, a decoding register C30B, and a region range register A31 are shown in FIG. 46.
In the encoding register C30A, a decimal point is placed between bit 15 and bit 16, and xe2x80x9cxxe2x80x9d (16 bits) shows an operation unit Cx32 for the LSZ 9. If the operation results in carry-over, the bits of xe2x80x9cxxe2x80x9d is propagated to the high order bit. xe2x80x9csxe2x80x9d (3 bits) shows a spacer bit unit Cs33, xe2x80x9cbxe2x80x9d (8 bits) shows a byte output unit Cb (Cb register) 34, and xe2x80x9ccxe2x80x9d (1 bit) shows a carry detector Cc35. In the encoding process, the value of the C register is updated to the lower limit value of the range corresponding to the encoded symbol as the code 4.
In the decoding register C30B, a low-order word CLOW 36 and a high-order word CHIGH 38 can be embodied by the registers of 32 bits. A decimal is set at position upper to the bit 31, which is MSB (Most Significant Bit). xe2x80x9cbxe2x80x9d (8 bits) is a high-order byte Cb37 of the byte inputting part (CLOW register 36), and xe2x80x9cxxe2x80x9d (16 bits) shows an operation unit Cx (CHIGH register 38) 39 corresponding to the LSZ 9. In the decoding process, the value of the C register is updated to an offset value of the code 4, which is coordinate of the region, from the lower limit value of the region corresponding to the decoded symbol.
The region range register A 31 is commonly used for the encoding and decoding processes. A decimal is set corresponding to the decimal of the encoding/decoding registers 30A and 30B, and xe2x80x9caxe2x80x9d (16 bits) is placed as decimal part corresponding to the register part xe2x80x9cxxe2x80x9d. At initial state, the integer part (bit 16) becomes xe2x80x9c1xe2x80x9d. The region range (also called as xe2x80x9cregion sizexe2x80x9d) is updated to Axe2x80x94LSZ (lower partial region range) or LSZ (upper partial region range). The region range register A31 is renormalized so that bit 15 showing weight of xc2xd becomes xe2x80x9c1xe2x80x9d except the initial value (the integer part=xe2x80x9c1xe2x80x9d). It is guaranteed that the lower partial region is obtained even if any LSZ 9 is selected as the upper partial region range by keeping the weigh more than xc2xd. In the renormalization, the A register 31 and the C register 30A or 30B are extended simultaneously.
In the QM-Coder, the upper partial region LSZ 9, which is fixed size for any state, is usually assigned to the LPS. When the lower partial region becomes smaller than the upper partial region, the upper partial region is assigned to the MPS by xe2x80x9cconditional MPSILPS exchangexe2x80x9d. On encoding/decoding the LPS, or encoding/decoding MPS by applying xe2x80x9cconditional MPS/LPS exchangexe2x80x9d, renormalization is always implemented.
The encoding/decoding processing flow will be explained according to the bit arrangement of the register. In the processing flow, a term xe2x80x9clayer (of the resolution)xe2x80x9d in case of hierarchical encoding and xe2x80x9cstripexe2x80x9d means xe2x80x9cstripexe2x80x9d of the image divided by N line unit (only the last stripe may have lines equal to or less than N lines). Here, it is assumed that the number of layers is 1, however, this encodingidecoding process can be applied to plural layers.
The following auxiliary variables CT 50, BUFFER 51, SC 52, and TEMP 53 are used for explaining the encoding/decoding process as well as variables, tables, and registers described above in the explanation of FIGS. 42, 43 and 46. The auxiliary variable CT 50 counts the number of shifts by the renormalizaion implemented in the C registers 30A, 30B and the A register 31. When the value becomes xe2x80x9c0xe2x80x9d, the CT 50 is used for inputting/outputting byte of a next code. The auxiliary variable BUFFER 51 stores byte value of the code supplied from the C register 30A and stores byte value of the code input to the C register 30B. The SC 52 is used only for encoding, and counts the number byte value of 0xFF continuously occur in the code output from the C register 30A. The TEMP 53 is used only for encoding, and detects the carry-over to the BUFFER 51, obtains the low order 8 bits of the carry-over number as a new value of the BUFFER 51. The BUFFER 51 is set by the C register 30A through the TEMP 53. The BUFFER 51 never becomes 0xff without the carry-over. In case of the carry-over to the high order bits, the bits, the order of which is lower than the BUFFER 51, namely, the BUFFER 51 and SC 52 number of 0xff, may be changed. Accordingly, the code output from the C register 30A cannot be determined as the code 4.
FIG. 47 is a flowchart showing a general encoding process of the ENCODER. Among processing flows of the International Standard Recommendation T.82, prediction process for TP (Typical Prediction) and DP (Deterministic Prediction) are not directly related to the present invention nor the conventional art, thus an explanation for TP and DP is omitted. First, at step S101, INITENC is called to perform initialization of encoding process. At step S102, a pair of the pixel PIX and the context CX is read one by one to be encoded by the ENCODE process at step S103. At step S104, S102 and S103 are repeated until the stripe (or image) is finished to be supplied. Finally, FLUSH is called at step S105 to perform termination process.
FIG. 48 is a flowchart showing ENCODE processing flow. In this flow, a process to be called is switched based on match or mismatch between the encoding pixel value 3 and the prediction value 7. At step S111, match or mismatch between the pixel value 3 and the prediction value 7 is detected. When match is detected, the encoder encodes MPS, and when mismatch is detected, the encoder encodes LPS. At step S113, CODEMPS is called to encode the MPS, and at step S112, CODELPS is called to encode the LPS.
FIG. 49 is a flowchart showing CODELPS processing flow. The CODELPS is called for encoding the LPS, namely, the mismatch is detected between the encoding pixel value 3 and the prediction value 7. At step S121, the value of the A register 31 is temporarily updated to the lower partial region range. If step S122 results in xe2x80x9cYesxe2x80x9d, conditional MPSILPS exchange is applied. Namely, the value of the A register 31 is unchanged to encode the lower partial region and the C register 30A is not updated. If step S122 results in xe2x80x9cNoxe2x80x9d, the upper partial region is encoded. That is, at step S123, the C register 30A showing the lower limit value is updated and at step S124, the A register 31 showing the region range is updated. When the constant SWTCH value 12 equals xe2x80x9c1xe2x80x9d at step S125, the prediction value (MPS table) is inverted or updated at step S126. In LPS encoding, the state transition referring to the NLPS table 11 is performed at step S127. At step S128, renormalization is implemented by calling RENORME.
FIG. 50 is a flowchart showing CODEMPS processing flow. The CODEMPS is called for encoding MPS, that is, the encoding pixel value 3 matches to the prediction value 7. First, at step S131, the value of the A register 31 is temporarily updated to the lower partial region range. If step S132 results in xe2x80x9cNoxe2x80x9d, the CODEMPS process terminates with this step. If step S132 results in xe2x80x9cYesxe2x80x9d, the state transition is always implemented referring to the NMPS table 10 at step S136. And at step S137, the renormalization is implemented by calling RENORME. Before steps S136 and 137, if step S133 results in xe2x80x9cYesxe2x80x9d, the A register 31 does not change for encoding the lower partial region and the C register 30A is not updated. If step S133 results in xe2x80x9cNoxe2x80x9d, the conditional MPS/LPS exchange is applied and the upper partial region is encoded. At step S134, the C register 30A is updated and the A register 31 is updated at step S136.
FIG. 51 shows RENORME processing flow for implementing the renormalization. To shift the value of the A register 31 and the C register 30A to higher order by 1 bit respectively at steps S141 and S142 means to perform an operation equal to the multiplication by 2. At step S143, 1 is subtracted from the variable CT 50 and at step S144, it is checked whether the variable CT 50 is xe2x80x9c0xe2x80x9d or not. If step S144 results in xe2x80x9cYesxe2x80x9d, BYTEOUT process is called at step S145 and the C register 30A outputs the code 4 of one byte. At step S146, completion of the renormalization is detected. If the value of the A register 31 is less than 0x8000, steps S141 through S145 are repeated. If the value of the A register 31 is equal to or more than 0x8000, the region becomes equal to or greater than xc2xd, and the renormalization process is completed.
FIG. 52 shows BYTEOUT processing flow for outputting the code 4 byte by byte from the C register 30A. A byte output section Cb 34 of the C register 30A shows a part to be output. The carry detector Cc 35 operates at the same time for detecting carry-over. At step S151, 9 bits of the sum of the Cb register 34 and the Cc register 35 are set to the variable TEMP 53. The byte output is processed by three ways based on the check at steps S152 and S159. Namely, a case where the carry-over has occurred at step S152 (TEMP greater than 0x100; Cc=1), a case where the carry-over has not occurred and TEMP=0xFF, and a case where the carry-over has not occurred and TEMP less than 0xFF. If step S152 results in xe2x80x9cYesxe2x80x9d, at step S153, the code already output from the C register 30A and stored as the BUFFER 51 and carry-over value 1 is determined as a code. At step S154, SC 52 number of byte value 0 (stacked 0xFF has been converted into 0x00 by the carry-over) is written and xe2x80x9cSC+1xe2x80x9d bytes of the code value with carry-over is determined. At step S155, the variable SC 52 is set to xe2x80x9c0xe2x80x9d and at step S156, the low order 8 bits of the variable TEMP are set to the variable BUFFER 51. At step S157, the Cc register 35 and the Cb register 34, which are processed as variable TEMP 53, are cleared. At step S158, xe2x80x9c8xe2x80x9d is set to the variable CT 50 for processing 8 bits until a next byte is output. If step S159 results in xe2x80x9cYesxe2x80x9d, the code 4 cannot be determined and the variable SC 52 is incremented by xe2x80x9c1xe2x80x9d to accumulate 0xFF. If step S159 results in xe2x80x9cNoxe2x80x9d, the code 4 already output from the C register 30A is written as the value of the BUFFER 51 at step S153. At step S154, SC 52 number of byte value 0xFF are written and the code value of xe2x80x9cSC+1xe2x80x9d bytes is determined as the code value. At step S163, the variable SC 52 is set to xe2x80x9c0xe2x80x9d and at step S164, the variable TEMP 53 (8 bits, without carry-over) is set to the variable BUFFER 51.
FIG. 53 shows INITENC processing flow for setting the initial values of the ST table 8, the MPS table 7 and each variable at starting time of the encoding. In the figure, at step S171, xe2x80x9cthe first stripe of this layerxe2x80x9d means xe2x80x9cstarting time of encoding an imagexe2x80x9d when the image does not include a concept of layer or stripe. In case of an image consisting of a plurality of stripes, processing can be continued without initializing the variable tables for each stripe. At step S171, it is checked if this is the first stripe of the pixel of this layer or forced reset of the tables. If step S171 results in xe2x80x9cYesxe2x80x9d, the ST table 8 and the MPS table 7, which are the variable tables for all the contexts CX 2, are initialized at step S172. The SC 52, the A register 31, the C register 30A and the variable CT 50 are initialized at steps S173, S174, S175 and S176, respectively. The initial value 11 of the CT 50 is the sum of the number of bits of the Cb register 34 and the number of bits of the Cs register 33. After processing 11 bits, the first code is output. If step S171 results in xe2x80x9cNoxe2x80x9d, the table values at the end of the previous stripe of the same layer are set to the variable tables at step S177 instead of the initialization, and the value of the table of the end of the previous stripe on the same layer.
FIG. 54 shows FLUSH processing flow for implementing termination process including sweeping out the remaining value in the C register 30A. At step S181, CLEARBITS is called to minimize the number of effective bits of the code remaining in the C register 30A. At step S182, FINALWRITES is called to finally output the variable BUFFER 51, SC 52 and the code 4, which has been undetermined and is now determined, of the C register 30A. At step S183, the first byte of the code 4 is removed because the variable BUFFER 51 is output (as integer part of the code) prior to the value output from the C register 30A. At step S184, the consecutive bytes xe2x80x9c0x00xe2x80x9d at the end of the code 4 can be removed, if desired, because the code 4 is decimal coordinates within the final effective range.
FIG. 55 shows CLEARBITS processing flow for minimizing the number of effective bits of the code 4 at the end of encoding. By this process, the code 4 is determined to be the value that ends with the greatest possible number ofxe2x80x9c0x00xe2x80x9d. At step S191, the variable TEMP 53 is set to the value obtained by clearing the low-order two bytes (Cx register 32) of the upper limit value of the final effective range. At step S192, it is checked if the value obtained by clearing the low-order two bytes of the upper limit value is larger than the value of the C register 30A. If step S192 results in xe2x80x9cYesxe2x80x9d, overcleared 1 bit (0x8000) is returned to the variable TEMP 53 at step S193 and the value of the C register 30A is set to the value after returning the overcleared bit. If step S192 results in xe2x80x9cNoxe2x80x9d, the value of the variable TEMP 53 is set in the C register 30A.
FIG. 56 shows FINALWRITES processing flow for writing the code determined at the end of encoding including remaining value in the C register 30A. At step S201, the C register is shifted by the number of bits shown by the values of the variable CT 50 to enable to output the code and to detect the carry-over. At step S202, it is checked if the carry-over has occurred or not. If step S202 results in xe2x80x9cYesxe2x80x9d, the carry-over has occurred and if xe2x80x9cNoxe2x80x9d, the carry-over has not occurred. As well as in the BYTEOUT processing flow, the code 4 of xe2x80x9cSC+1xe2x80x9d bytes is determined by writing the code value already output from the C register at steps S203 and S204 for the code value with the carry-over or at steps S207 and S208 for the code value without the carry-over. At step S205, the register Cb value (1 byte), and at step S206, the low-order 1 byte of the register Cb is output, respectively, and the coding is finished.
FIG. 57 shows DECODER processing flow illustrating a whole decoding process. As well as FIG. 47 of the encoding process, among processing flows of the International Standard Recommendation T.82, processes for TP (Typical Prediction) and DP (Deterministic Prediction) are not directly related to the present invention nor the conventional arts (the first and the second related arts), thus an explanation is omitted. First, at step S211, INITDEC is called to initialize the decoding process. At step S212, the contexts CX 2 is read one by one. At step S213, the pixel PIX 3 is decoded by the process DECODE. At step S214, steps S212 and S213 will be repeated until the stripe (or the image) is finished to be supplied. Further, at step S214, decoding process is finished after there is no remaining stripe.
FIG. 58 shows DECODE processing flow for decoding the decoding pixel. First, at step S221, the value of the A register 31 is temporarily updated by the lower partial region range. If step S222 results in xe2x80x9cYesxe2x80x9d, the lower partial region is decoded. If step S223 results in xe2x80x9cYesxe2x80x9d, MPS_EXCHANGE is called at step S224 and RENORMD is called at step S225 to implement the renormalization. If step S223 results in xe2x80x9cNoxe2x80x9d, the MPS is decoded without implementing the renormalization, and the prediction value 7 is taken as the pixel value 3. If step S222 results in xe2x80x9cNoxe2x80x9d, the upper partial region is decoded. LPS_EXCHANGE is called at step S227 and RENORMD is called at step S228 to implement the renormalization. In the path for calling MPS_EXCHANGE and LPS_EXCHANGE, even if the decoding region is determined, it is impossible to know which should be decoded between MPS and LPS without detecting which region is larger, MPS or LPS. Accordingly, each pixel value 3 is determined by the called processing flow.
FIG. 59 shows LPS_EXCHANGE processing flow for decoding the upper partial region. If step S231 results in xe2x80x9cYesxe2x80x9d, the MPS is decoded. At step S232, the C register 30B is updated and the A register 31 is updated at step S233. At step S234, the prediction value 7 is determined as the pixel value 3 without any change. At step S235, a state is moved to a next state by referring to the NMPS table 10. If step S231 results in xe2x80x9cNoxe2x80x9d, the LPS is decoded. At step S236, the C register 30B is updated and the A register 31 is updated at step S237. At step S238, non-prediction value xe2x80x9c1xe2x88x92prediction valuexe2x80x9d is determined as the pixel value 3. If step S239 results in xe2x80x9cYesxe2x80x9d, the prediction value (MPS table) 7 is inverted or updated at step S240. At step S241, a state is moved to a next state by referring to the NLPS table 11.
FIG. 60 shows MPS_EXCHANGE processing flow for decoding the lower partial region. If step S251 results in xe2x80x9cYesxe2x80x9d, the LPS is decoded. At step S252, non-prediction value is determined as the pixel value 3. If step S253 results in xe2x80x9cYesxe2x80x9d, the prediction value (MPS table) is inverted or updated at step S254. At step S265, a state is moved to a next state by referring to the NLPS table 11. If step S251 results in xe2x80x9cNoxe2x80x9d, the MPS is decoded. At step S256, the prediction value 7 is determined as the pixel value 3 without any change. At step S257, a state is moved to a next state by referring to the NMPS table 10.
FIG. 61 shows RENORMD processing flow for implementing renormalization. At step S261, it is checked whether the value of the variable CT 50 is 0 or not. If step S261 results in xe2x80x9cYesxe2x80x9d, BYTEIN is called so as to input the code 4 of one byte into the C register 30B at step S262. At step S263, the A register 32 is shifted to higher-order by 1 bit and the C register 30B is shifted to higher-order by 1 bit at step S264. This shifting operation equals to duplication. At step S266, 1 is subtracted from the variable CT 50. At step S266, it is checked whether the renormalization is completed, that is, the value of the A register 31 is less than 0x8000, or not. If the value of the A register 32 is less than 0x8000, steps S261 through S265 are repeated. At step S267, it is checked whether the value of the variable CT 50 is 0 or not. If step S267 results in xe2x80x9cYesxe2x80x9d, BYTEIN is called so as to input the code of one byte into the C register 30B.
FIG. 62 shows BYTEIN processing flow for reading the code 4 into the C register 30B byte by byte. In the figure, xe2x80x9cSCDxe2x80x9d (Stripe Coded Data) is the code 4 for stripe. If step S271 results in xe2x80x9cYesxe2x80x9d, no code 4 is to be read at step S272, and the variable BUFFER 51 is set to xe2x80x9c0xe2x80x9d. At step S273, the value of the variable BUFFER 51 is read into the CLOW register 36 (Cb 37), and at step S274, the variable CT 50 is set to xe2x80x9c8xe2x80x9d for processing the code of 8 bits until a next code is input. If step S271 results in xe2x80x9cNoxe2x80x9d, the code 4 of one byte is read from the xe2x80x9cSCDxe2x80x9d into the variable BUFFER 51 at step S275.
FIG. 63 shows INITDEC processing flow for setting initial values of the ST table 8, the MPS table 7 and each variable at starting time of the decoding. Initialization of the table values of steps S281, S282 and S290 are the same as ones of steps S171, S172 and S177 of INITENC processing flow in the encoding process. The initial value of the C register 30B is set by inserting 3 bytes of the code 4 into the Cx register 39 and the Cb register 37. At step S283, the C register 30B is cleared, and at step S284, BYTEIN is called so as to insert 1 byte of the code 4 into the Cb register 37. At step S285, the C register 30B is shifted by 8 bits, and at step S286, BYTEIN is called so as to insert 1 byte of the code 4 into the Cb register 37. At step S287, the C register 30B is shifted by 8 bits, and at step S288, BYTEIN is called so as to insert 1 byte of the code 4 into the Cb register 37. By these steps, the sum of 3 bytes of the code 4 is set in the Cx register 39 and the Cb register 37. The initial value of the A register 31 is set at step S289.
According to the conventional method for controlling reproduction quality of data, it is required for an encoding side or a sender side to prepare data used for each corresponding level in order to provide various quality levels of reproduced data contents to a user, which needs a large amount of storage capacity.
On the other hand, it is required for the user of the data contents to perform receiving operation plural times in order to previously confirm an outline of the data and subsequently receive the whole data.
Further, since a reproduction quality of the decoded data of a conventional code for the data contents is always at a fixed level, a copyright of the data contents cannot be protected.
Further, an encryption of the data is performed to promote a proper access to the data, however, this encryption process requires further processing load and processing time because the encryption is performed independently from the encoding operation. In particular, in case of a configuration in which parallel processing cannot be done such as S/W and thus requires sequential processing, which causes the circuit scale to increase and requires more processing time.
The present invention is provided to solve the above problems. The invention provides a system in which the encoding side or the sender side can supply uniformed information to the user only by sending one code data, and the receiving user of the decoding side can decode the data contents having various levels of reproduction quality by applying change information which is previously stored from the same code data.
Further, it is possible to allow only a proper user to access proper information by limiting the reproduction quality or by making the reproduction impossible.
Yet further, in case of encoding, simulated encryption is performed, so that encoding and encryption, decryption and decoding do not become independent processes, which reduces the processing load and processing time.
According to the present invention, an encoder for generating multiple quality data having a modeling unit for modeling input data sequence to obtain a data value and a parameter, an encoding unit for encoding an output from the modeling unit, and a code sending unit for sending an output from the encoding unit, the encoder includes:
a) a setting changing unit for instructing to change one of the data value and the parameter based on change information; and
at least one of following b-1) and b-2):
b-1) a data manipulating unit for manipulating either of the data value or the parameter output from the modeling unit to output to the encoding unit based on the change information instructed by the setting changing unit; and
b-2) a code manipulating unit for obtaining encoded result by instructing the encoding unit to perform predetermined change or manipulating sending code output sent by the code sending unit based on the change information instructed by the change setting unit.
The encoder for generating multiple quality data further includes an evaluating unit for evaluating sending output which has been changed based on the change information, and the encoder sets the change information again based on an evaluation result of the evaluating unit.
Further, the setting changing unit instructs to insert/delete a specific bit as the change information, and the data manipulating unit or the code manipulating unit correspondingly manipulates data based on the change information of inserting/deleting the specific bit.
Further, the setting changing unit instructs to change an initial value of context or a prediction value of the context as the change information, and the data manipulating unit or the code manipulating unit correspondingly manipulates data based on above change information.
Further, the setting changing unit instructs to add/delete a certain bit to/from encoding parameter on encoding, and the code manipulating unit correspondingly changes a value of an operation register for encoding performed by the encoding unit.
Further, the code manipulating unit performs one of the following: to change variable/constant tables in the encoding unit; to change a value of a register/a counter; and to change a coding rule.
The encoding unit for generating multiple quality data further includes a construction unit dividing unit for dividing the input data sequence into a predetermined data construction unit and outputting to the modeling unit, and the changing setting unit, the data manipulating unit, and the code manipulating unit performs operations by each data construction unit divided.
Further, the change information specifies a location of a setting storage area in which actual change information is previously stored, and the data manipulating unit manipulates the change on modeling or the code manipulating unit manipulates the change on encoding based on the actual change information stored in the setting storage area.
According to the invention, a decoder for generating multiple quality data having a code receiving unit for receiving input code sequence, a decoding unit for decoding the input code sequence received, and a modeling unit for obtaining data sequence from data value decoded and a self-generated parameter, the decoder includes:
a) a setting changing unit for setting change information instructing to change one of a data value and a parameter sent by an encoder; and
at least one of following b-1) and b-2):
b-1) a code manipulating unit for manipulating the code sequence received based on the change information instructed by the setting changing unit to output to the code receiving unit or for obtaining a result decoded by the decoding unit which has been manipulated by instructing a predetermined change; and
b-2) a data manipulating unit for obtaining a predetermined data sequence by instructing manipulation to the modeling unit to change the data value or the self-generated parameter output by the decoding unit based on the change information set by the setting changing unit.
Further, the setting changing unit sets inserting/deleting a specific bit as the change information, and the data manipulating unit or the code manipulating unit correspondingly performs process based on the inserting/deleting.
Further, the setting changing unit sets to change an initial value of context or a prediction value of the context as the change information, and the data manipulating unit or the code manipulating unit correspondingly performs changing process based on an instruction.
Further, the setting changing unit instructs to add/delete a certain bit to/from the parameter decoded as the change information, and the code manipulating unit correspondingly changes a value of an operation register for decoding performed by the decoding unit.
Further, the code manipulating unit performs one of the following: to change variable/constant tables in the decoding unit; to change a value of a register/a counter; and to change a coding rule.
The decoding unit for generating multiple quality data further includes a construction unit assembling unit for obtaining a normal data sequence from a predetermined data construction unit divided from the data sequence, and the construction unit assembling unit performs decoding and modeling for each of the predetermined data construction unit based on the change information set by the setting changing unit.
Further, the change information specifies a location of a setting storage area in which actual change information is previously stored, and the data manipulating unit manipulates the change on modeling or the code manipulating unit manipulates the change on decoding based on the actual change information stored in the setting storage area.
According to the invention, an encoding/decoding system for generating multiple quality data having a first modeling unit for modeling input data sequence to obtain a first data value and a first parameter, an encoding unit for encoding an output from the first modeling unit, and a code sending unit for sending an output from the encoding unit as a code sequence,
a code receiving unit for receiving the code sequence, a decoding unit for decoding an output of the code receiving unit, and a second modeling unit for obtaining a second data sequence from a second data value decoded and a second self-generated parameter,
the encoding/decoding system includes:
an encoder having:
a) a first setting changing unit for instructing to change one of the first data value and the first parameter based on change information; and
b) at least one of a first data manipulating unit for manipulating either of the first data value or the first parameter output from the first modeling unit to output to the encoding unit based on the change information instructed by the first setting changing unit, and a first code manipulating unit for obtaining encoded result by instructing the encoding unit to perform predetermined change or manipulating sending code output sent by the code sending unit based on the change information instructed by the first changing setting unit; and
a decoder having:
c) a second setting changing unit for setting change information instructing to change one of a data value and a parameter sent by an encoder side; and
d) at least one of a second code manipulating unit for manipulating the code sequence received based on the change information instructed by the second setting changing unit to output to the code receiving unit or for obtaining a result decoded by the decoding unit which has been manipulated by instructing a predetermined change, and a second data manipulating unit for obtaining a predetermined data sequence by instructing manipulation to the second modeling unit to change a second data value or second self-generated parameter output by the decoding unit based on the change information set by the second setting changing unit.
Further, the change information is sent to a decoder side after a predetermined procedure is completed.
According to the invention, an encoding method for generating multiple quality data having a modeling step for modeling input data sequence to obtain a data value and a parameter, an encoding step for encoding an output from the modeling step, and a code sending step for sending an output from the encoding step, the encoding method includes:
a) a setting changing step for instructing to change one of the data value and the parameter based on change information; and
at least one of following b-1) and b-2):
b-1) a data manipulating step for manipulating either of the data value or the parameter output from the modeling step to output before the encoding step based on the change information instructed by the setting changing step; and
b-2) a code manipulating step for obtaining encoded result by instructing the encoding step to perform predetermined change or manipulating sending code output sent by the code sending step based on the change information instructed by the change setting step.
According to the invention, a decoding method for generating multiple quality data having a code receiving step for receiving input code sequence, a decoding step for decoding the input code sequence received, and a modeling step for obtaining data sequence from data value decoded and a self-generated parameter, the decoding method includes:
a) a setting changing step for setting change information instructing to change one of a data value and a parameter sent by an encoder; and
at least one of following b-1) and b-2):
b-1) a code manipulating step for manipulating the input code sequence received based on the change information instructed by the setting changing step to output to the code receiving step or for obtaining a result decoded by the decoding step which has been manipulated by instructing a predetermined change; and
b-2) a data manipulating step for obtaining a predetermined data sequence by instructing manipulation to the modeling step to change the data value or the self-generated parameter output by the decoding step based on the change information set by the setting changing step.
According to the invention, an encoding/decoding method for generating multiple quality data having a first modeling step for modeling input data sequence to obtain a first data value and a first parameter, an encoding step for encoding an output from the first modeling step, and a code sending step for sending an output from the encoding step as a code sequence,
a code receiving step for receiving the code sequence, a decoding step for decoding an output of the code receiving step, and a second modeling step for obtaining a second data sequence from a second data value decoded and a second self-generated parameter,
the encoding/decoding method includes:
a) a first setting changing step for instructing to change one of the first data value and the first parameter based on change information; and
b) at least one of a first data manipulating step for manipulating either of the first data value or the first parameter output from the first modeling step to output to the encoding step based on the change information instructed by the first setting changing step, and a first code manipulating step for obtaining encoded result by instructing the encoding step to perform predetermined change or manipulating sending code output sent by the code sending step based on the change information instructed by the first changing setting step;
c) a second setting changing step for setting change information instructing to change one of a data value and a parameter sent by an encoder side; and
d) at least one of a second code manipulating step for manipulating the code sequence received based on the change information instructed by the second setting changing step to output to the code receiving step or for obtaining a result decoded by the decoding step which has been manipulated by instructing a predetermined change, and a second data manipulating step for obtaining a predetermined data sequence by instructing manipulation to the second modeling step to change a second data value or a second self-generated parameter output by the decoding step based on the change information set by the second setting changing step.